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Multi-Net Optimization of VLSI Interconnect

MOISEEV, Konstantin - Personal Name; KOLODNY , Avinoam - Personal Name; WIMER, Shmuel - Personal Name;

This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits.

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Series Title: -
Call Number: -
Publisher: : ., 2015
Collation: XVI, 233
Language: English
ISBN/ISSN: 978-1-4614-0820-8
Classification: NONE
Content Type: -
Media Type: -
Carrier Type: -
Edition: 1
Subject(s): Electronic Circuits and Systems
Processor Architectures
Electronics and Microelectronics
Instrumentation
Specific Detail Info: -
Statement of Responsibility: Konstantin Moiseev , Avinoam Kolodny , Shmuel Wimer

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Cataloger: Fandi
Source: -

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