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Logic Synthesis for FPGA-Based Finite State Machines

Alexander Barkalov - Personal Name; Larysa Titarenko - Personal Name; Malgorzata Kolopienczyk - Personal Name; Kamil Mielcarek - Personal Name; Grzegorz Bazydlo - Personal Name;

This book discusses control units represented by the model of a finite state machine (FSM). It contains various original methods and takes into account the peculiarities of field-programmable gate arrays (FPGA) chips and a FSM model. It shows that one of the peculiarities of FPGA chips is the existence of embedded memory blocks (EMB). The book is devoted to the solution of problems of logic synthesis and reduction of hardware amount in control units. The book will be interesting and useful for researchers and PhD students in the area of Electrical Engineering and Computer Science, as well as for designers of modern digital systems.


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Detail Information
Series Title
-
Call Number
-
Publisher
Cham : Springer Cham., 2016
Collation
-
Language
English
ISBN/ISSN
978-3-319-24202-6
Classification
NONE
Content Type
-
Media Type
-
Carrier Type
-
Edition
-
Subject(s)
Industrial Mathematics
Specific Detail Info
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Statement of Responsibility
Alexander Barkalov, Larysa Titarenko, Malgorzata Kolopienczyk, Kamil Mielcarek, Grzegorz Bazydlo
Other Information
Cataloger
Kholif Basri
Source
https://link.springer.com/book/10.1007/978-3-319-24202-6
Validator
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  • Logic Synthesis for FPGA-Based Finite State Machines
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