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Formal Specification Level

This book introduces a new level of abstraction that closes the gap between the textual specification of embedded systems and the executable model at the Electronic System Level (ESL). Readers will be enabled to operate at this new, Formal Specification Level (FSL), using models which not only allow significant verification tasks in this early stage of the design flow, but also can be extracted semi-automatically from the textual specification in an interactive manner. The authors explain how to use these verification tasks to check conceptual properties, e.g. whether requirements are in conflict, as well as dynamic behavior, in terms of execution traces.

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Call Number
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Publisher
Cham : Springer.,
Collation
VIII, 138 pages
Language
English
ISBN/ISSN
978-3-319-08699-6
Classification
NONE
Content Type
text
Media Type
computer
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Edition
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Subject(s)
Circuits and Systems, Processor Architectures
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Statement of Responsibility
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Cataloger
Jemadi
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