OPEN EDUCATIONAL RESOURCES

UPA PERPUSTAKAAN UNEJ | NPP. 3509212D1000001

  • Home
  • Admin
  • Select Language :
    Arabic Bengali Brazilian Portuguese English Espanol German Indonesian Japanese Malay Persian Russian Thai Turkish Urdu

Search by :

ALL Author Subject ISBN/ISSN Advanced Search

Last search:

{{tmpObj[k].text}}
Image of High Performance Integer Arithmetic Circuit Design on FPGA
Architecture, Implementation and Design Automation
Bookmark Share

Text

High Performance Integer Arithmetic Circuit Design on FPGA Architecture, Implementation and Design Automation

PALCHAUDHURI ,Ayan - Personal Name; CHAKRABORTY, Rajat Subhra - Personal Name;

This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary “User Constraints File”. The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students and professionals engaged in the domain of FPGA circuit optimization and implementation.


Availability

No copy data

Detail Information
Series Title
-
Call Number
621 PAL h
Publisher
: ., 2016
Collation
XVII, 114
Language
English
ISBN/ISSN
978-81-322-2519-5
Classification
621
Content Type
text
Media Type
computer
Carrier Type
online resource
Edition
-
Subject(s)
Circuits and Systems
Specific Detail Info
-
Statement of Responsibility
Ayan Palchaudhuri , Rajat Subhra Chakraborty
Other Information
Cataloger
Khusnun
Source
-
Validator
-
Digital Object Identifier (DOI)
-
Journal Volume
-
Journal Issue
-
Subtitle
-
Parallel Title
-
Other version/related

No other version available

File Attachment
  • High Performance Integer Arithmetic Circuit Design on FPGA Architecture, Implementation and Design Automation
Comments

You must be logged in to post a comment

OPEN EDUCATIONAL RESOURCES

Search

start it by typing one or more keywords for title, author or subject


Select the topic you are interested in
  • Computer Science, Information & General Works
  • Philosophy & Psychology
  • Religion
  • Social Sciences
  • Language
  • Pure Science
  • Applied Sciences
  • Art & Recreation
  • Literature
  • History & Geography
Icons made by Freepik from www.flaticon.com
Advanced Search
Where do you want to share?