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Finite State Machines in Hardware: Theory and Design (with VHDL and SystemVerilog)

Pedroni, Volnei A., - Personal Name;

Modern, complex digital systems invariably include hardware-implemented finite state machines. The correct design of such parts is crucial for attaining proper system performance. This book offers detailed, comprehensive coverage of the theory and design for any category of hardware-implemented finite state machines. It describes crucial design problems that lead to incorrect or far from optimal implementation and provides examples of finite state machines developed in both VHDL and SystemVerilog (the successor of Verilog) hardware description languages. Important features include: extensive review of design practices for sequential digital circuits; a new division of all state machines into three hardware-based categories, encompassing all possible situations, with numerous practical examples provided in all three categories; the presentation of complete designs, with detailed VHDL and SystemVerilog codes, comments, and simulation results, all tested in FPGA devices; and exercise examples, all of which can be synthesized, simulated, and physically implemented in FPGA boards. Additional material is available on the book's Website. Designing a state machine in hardware is more complex than designing it in software. Although interest in hardware for finite state machines has grown dramatically in recent years, there is no comprehensive treatment of the subject. This book offers the most detailed coverage of finite state machines available. It will be essential for industrial designers of digital systems and for students of electrical engineering and computer science.OCLC-licensed vendor bibliographic record.


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Detail Information
Series Title
-
Call Number
-
Publisher
: The MIT Press., 2013
Collation
1 online resource (x, 337 pages) :illustrations
Language
English
ISBN/ISSN
9780262319096
Classification
NONE
Content Type
text
Media Type
computer
Carrier Type
online resource
Edition
-
Subject(s)
Computer Systems
SystemVerilog (Computer hardware description langu
VHDL (Computer hardware description language)
Sequential machine theory
Specific Detail Info
-
Statement of Responsibility
Volnei A. Pedroni.
Other Information
Cataloger
oci
Source
-
Validator
-
Digital Object Identifier (DOI)
https://doi.org/10.7551/mitpress/9657.001.0001
Journal Volume
-
Journal Issue
-
Subtitle
-
Parallel Title
-
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  • Finite State Machines in Hardware: Theory and Design (with VHDL and SystemVerilog)
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